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Date: Wed, 06 Jun 2012 16:21:12 +0200
From: Peter Zijlstra <a.p.zijlstra@...llo.nl>
To: Andi Kleen <ak@...ux.intel.com>
Cc: Andi Kleen <andi@...stfloor.org>, linux-kernel@...r.kernel.org,
eranian@...gle.com
Subject: Re: [PATCH 5/5] perf, x86: Prefer RDPMC over RDMSR for reading
counters
On Wed, 2012-06-06 at 07:16 -0700, Andi Kleen wrote:
> On Wed, Jun 06, 2012 at 12:46:19PM +0200, Peter Zijlstra wrote:
> > On Tue, 2012-06-05 at 17:56 -0700, Andi Kleen wrote:
> > > From: Andi Kleen <ak@...ux.intel.com>
> > >
> > > RDPMC is much faster than RDMSR for reading performance counters,
> > > since it's not serializing. Use it if possible in the perf handler.
> > >
> > > Only tested on Sandy Bridge, so I only enabled it there so far.
> >
> > That's just stupid.. I took Vince's patch from a while back.
>
> What do you mean? It's significantly faster to read the counters this
> way, because it avoids serialization and other overhead.
What I'm saying is you only enabling it for snb and being too lazy to
test anything else. Nor do I think its worth the conditional, all chips
we have PMU support for have rdpmc instructions.
> Vince's patch only enabled it for user space I believe, This is for lowering
> the kernel PMI handler overhead.
No, his patch did the kernel thing. Furthermore he actually tested it on
a bunch of machines.
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