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Date: Wed, 6 Jun 2012 18:10:44 +0200
From: Andi Kleen <andi@...stfloor.org>
To: Peter Zijlstra <a.p.zijlstra@...llo.nl>
Cc: Andi Kleen <andi@...stfloor.org>, linux-kernel@...r.kernel.org,
eranian@...gle.com, Andi Kleen <ak@...ux.intel.com>
Subject: Re: [PATCH 2/5] perf, x86: Don't assume there can be only 4 PEBS events
On Wed, Jun 06, 2012 at 05:00:03PM +0200, Peter Zijlstra wrote:
> On Tue, 2012-06-05 at 17:56 -0700, Andi Kleen wrote:
> > On Sandy Bridge in non HT mode there are 8 counters available. Since every
> > counter can write a PEBS record assuming there are 4 max is incorrect. Use
> > the reported counter number -- with an upper limit for a static array -- instead.
>
>
> While I queued this patch, its effectively a NOP since all SNB PEBS
> constraints are still on 4 counters.
Yes need to update the constraints too. I think Stephane was looking at that.
Perhaps two sets depending on the counters in CPUID?
FWIW I saw the warn on triggering.
-Andi
--
ak@...ux.intel.com -- Speaking for myself only.
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