| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-ID: <20120607124452.GE11153@aftab.osrc.amd.com> Date: Thu, 7 Jun 2012 14:44:52 +0200 From: Borislav Petkov <borislav.petkov@....com> To: Rob Herring <robherring2@...il.com> CC: Mauro Carvalho Chehab <mchehab@...hat.com>, <linux-edac@...r.kernel.org>, <linux-kernel@...r.kernel.org>, <devicetree-discuss@...ts.ozlabs.org> Subject: Re: [PATCH 1/2] edac: add support for Calxeda highbank memory controller On Wed, Jun 06, 2012 at 05:56:40PM -0500, Rob Herring wrote: > > Hmm... I suspect that memories by DIMM chip select/channel at Calxeda, > > as it is using just 1 cs/channel. It probably makes more sense to add new layer > > type(s) to properly represent the way your memory controller addresses it, if > > Calxeda doesn't work with DIMMs. > > Not sure I follow. DIMMs are supported, but only a newer JEDEC form > factor (DDR3 72-bit mini DIMM). The h/w pretty much fixed to a single > 4GB DIMM. The controller is 1 72-bit channel. Me too, why would this need a new define although those are more-or-less normal DIMMs (modulo the form factor)? -- Regards/Gruss, Boris. Advanced Micro Devices GmbH Einsteinring 24, 85609 Dornach GM: Alberto Bozzo Reg: Dornach, Landkreis Muenchen HRB Nr. 43632 WEEE Registernr: 129 19551 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@...r.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Powered by blists - more mailing lists