linux-kernel - Re: [PATCH] ARM: mx35: add WEIM register addresses

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Message-ID: <20120607180738.GM30400@pengutronix.de>
Date:	Thu, 7 Jun 2012 20:07:38 +0200
From:	Sascha Hauer <s.hauer@...gutronix.de>
To:	Christoph Fritz <chf.fritz@...glemail.com>
Cc:	Sascha Hauer <kernel@...gutronix.de>,
	Russell King <linux@....linux.org.uk>,
	Fabio Estevam <fabio.estevam@...escale.com>,
	Christian Hemp <c.hemp@...tec.de>,
	linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
	"Hans J. Koch" <hjk@...sjkoch.de>
Subject: Re: [PATCH] ARM: mx35: add WEIM register addresses

Hi Christoph,

On Wed, May 09, 2012 at 03:16:38PM +0200, Christoph Fritz wrote:
> 
> This patch adds WEIM register addresses to mx35 platform header file.
> 
> Signed-off-by: Christoph Fritz <chf.fritz@...glemail.com>
> Signed-off-by: Christian Hemp <c.hemp@...tec.de>
> ---
>  arch/arm/plat-mxc/include/mach/mx35.h |    5 +++++
>  1 files changed, 5 insertions(+), 0 deletions(-)
> 
> diff --git a/arch/arm/plat-mxc/include/mach/mx35.h b/arch/arm/plat-mxc/include/mach/mx35.h
> index 80965a9..8b8f424 100644
> --- a/arch/arm/plat-mxc/include/mach/mx35.h
> +++ b/arch/arm/plat-mxc/include/mach/mx35.h
> @@ -111,6 +111,11 @@
>  #define MX35_EMI_CTL_BASE_ADDR			(MX35_X_MEMC_BASE_ADDR + 0x4000)
>  #define MX35_PCMCIA_CTL_BASE_ADDR		MX35_EMI_CTL_BASE_ADDR
>  
> +#define MX35_WEIM_CSCRx_BASE_ADDR(cs)	(MX35_WEIM_BASE_ADDR + (cs) * 0x10)
> +#define MX35_WEIM_CSCRxU(cs)		(MX35_WEIM_CSCRx_BASE_ADDR(cs))
> +#define MX35_WEIM_CSCRxL(cs)		(MX35_WEIM_CSCRx_BASE_ADDR(cs) + 0x4)
> +#define MX35_WEIM_CSCRxA(cs)		(MX35_WEIM_CSCRx_BASE_ADDR(cs) + 0x8)
> +

Honestly I'm not in the mood of adding another instance of the same
register defines. Currently we have:

#define MX31_WEIM_CSCRx_BASE_ADDR(cs) (MX31_WEIM_BASE_ADDR + (cs) * 0x10)
#define MX31_WEIM_CSCRxU(cs) (MX31_WEIM_CSCRx_BASE_ADDR(cs))
#define MX31_WEIM_CSCRxL(cs) (MX31_WEIM_CSCRx_BASE_ADDR(cs) + 0x4)
#define MX31_WEIM_CSCRxA(cs) (MX31_WEIM_CSCRx_BASE_ADDR(cs) + 0x8)

#define MX27_WEIM_CSCRx_BASE_ADDR(cs) (MX27_WEIM_BASE_ADDR + (cs) * 0x10)
#define MX27_WEIM_CSCRxU(cs) (MX27_WEIM_CSCRx_BASE_ADDR(cs))
#define MX27_WEIM_CSCRxL(cs) (MX27_WEIM_CSCRx_BASE_ADDR(cs) + 0x4)
#define MX27_WEIM_CSCRxA(cs) (MX27_WEIM_CSCRx_BASE_ADDR(cs) + 0x8)

The same could be used on i.MX25 aswell. I think we should clean this
up before adding more SoCs.

Sascha

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