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Message-ID: <CABPqkBTVBG92pUu-H+CSO4T1HojQsun7ngZ8Z8PJUFt-MwXkRg@mail.gmail.com>
Date:	Wed, 13 Jun 2012 15:51:11 +0200
From:	Stephane Eranian <eranian@...gle.com>
To:	Peter Zijlstra <a.p.zijlstra@...llo.nl>
Cc:	Jiri Olsa <jolsa@...hat.com>, acme@...hat.com, mingo@...e.hu,
	paulus@...ba.org, cjashfor@...ux.vnet.ibm.com, fweisbec@...il.com,
	gorcunov@...nvz.org, tzanussi@...il.com, mhiramat@...hat.com,
	robert.richter@....com, fche@...hat.com,
	linux-kernel@...r.kernel.org, masami.hiramatsu.pt@...achi.com,
	drepper@...il.com, asharma@...com, benjamin.redelings@...cent.org
Subject: Re: [PATCH 02/19] perf: Add ability to attach user level registers
 dump to sample

On Wed, Jun 13, 2012 at 3:41 PM, Stephane Eranian <eranian@...gle.com> wrote:
> On Wed, Jun 13, 2012 at 3:40 PM, Peter Zijlstra <a.p.zijlstra@...llo.nl> wrote:
>> On Wed, 2012-06-13 at 15:18 +0200, Stephane Eranian wrote:
>>>
>>> If you look carefully at perf_output_sample(), you will notice that data is
>>> written in the exact order of the enum perf_event_sample_format.
>>
>> Not so actually.. CALLCHAIN is out of order. Not sure why we did that
>> though.
>>
>>
>> But it should match the comment near PERF_RECORD_SAMPLE.
>
> Ok, yes that one. It would have been much nicer to follow the enum
> order.
In that case, the comment needs to be update to show the sample_user_regs[]
in the right order.

         *      { u32                   size;
         *        char                  data[size];}&& PERF_SAMPLE_RAW
         *
         *      { u64 from, to, flags } lbr[nr];} && PERF_SAMPLE_BRANCH_STACK
         *      { u64 size; u64 regs[size];} && PERF_SAMPLE_USER_REGS

Same thing for the user stack.
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