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Message-ID: <m2k3zaj0yi.fsf@firstfloor.org>
Date: Wed, 13 Jun 2012 15:34:13 -0700
From: Andi Kleen <andi@...stfloor.org>
To: Peter Zijlstra <peterz@...radead.org>
Cc: x86@...nel.org, linux-kernel@...r.kernel.org, eranian@...gle.com
Subject: Re: [PATCH 3/4] perf, x86: check ucode before disabling PEBS on SandyBridge v3
Peter Zijlstra <peterz@...radead.org> writes:
>
> Is there a ucode revision for C2 higher than 0x618 but lower than
> 0x70c ? If so, your code is wrong for it would enable PEBS on that chip.
I was told there's only a single revision per model number that goes up.
That's also the model that other microcode checks in Linux follow.
Not sure what's happening with Stephane's setup.
I get 0x618 on Stepping 6. I'll try to find a C2.
-Andi
--
ak@...ux.intel.com -- Speaking for myself only
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