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Date:	Thu, 14 Jun 2012 18:51:03 +0200
From:	Roland Stigge <stigge@...com.de>
To:	arm@...nel.org, linux-arm-kernel@...ts.infradead.org,
	linux-kernel@...r.kernel.org, kevin.wells@....com,
	srinivas.bakki@....com, aletes.xgr@...il.com
Cc:	Roland Stigge <stigge@...com.de>
Subject: [PATCH v2 13/23] ARM: LPC32xx: High Speed UART configuration via DT

This patch fixes the DTS files for the High Speed UARTs 1, 2 and 7 of the
LPC32xx SoC, adjusting the compatible strings, adding interrupts and status
configuration. On the PHY3250 reference board, UART2 is enabled.

Signed-off-by: Roland Stigge <stigge@...com.de>
Acked-by: Alexandre Pereira da Silva <aletes.xgr@...il.com>

---
 arch/arm/boot/dts/lpc32xx.dtsi |   16 +++++++++++-----
 arch/arm/boot/dts/phy3250.dts  |    4 ++++
 2 files changed, 15 insertions(+), 5 deletions(-)

--- linux-2.6.orig/arch/arm/boot/dts/lpc32xx.dtsi
+++ linux-2.6/arch/arm/boot/dts/lpc32xx.dtsi
@@ -212,18 +212,24 @@
 			};
 
 			uart1: serial@...14000 {
-				compatible = "nxp,serial";
+				compatible = "nxp,lpc3220-hsuart";
 				reg = <0x40014000 0x1000>;
+				interrupts = <26 0>;
+				status = "disabled";
 			};
 
 			uart2: serial@...18000 {
-				compatible = "nxp,serial";
+				compatible = "nxp,lpc3220-hsuart";
 				reg = <0x40018000 0x1000>;
+				interrupts = <25 0>;
+				status = "disabled";
 			};
 
-			uart7: serial@...1C000 {
-				compatible = "nxp,serial";
-				reg = <0x4001C000 0x1000>;
+			uart7: serial@...1c000 {
+				compatible = "nxp,lpc3220-hsuart";
+				reg = <0x4001c000 0x1000>;
+				interrupts = <24 0>;
+				status = "disabled";
 			};
 
 			rtc@...24000 {
--- linux-2.6.orig/arch/arm/boot/dts/phy3250.dts
+++ linux-2.6/arch/arm/boot/dts/phy3250.dts
@@ -148,6 +148,10 @@
 		};
 
 		fab {
+			uart2: serial@...18000 {
+				status = "okay";
+			};
+
 			tsc@...48000 {
 				status = "okay";
 			};
--
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