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Message-ID: <4FEA9FDD.6030102@kernel.org>
Date: Wed, 27 Jun 2012 14:53:33 +0900
From: Minchan Kim <minchan@...nel.org>
To: Seth Jennings <sjenning@...ux.vnet.ibm.com>
CC: Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
devel@...verdev.osuosl.org,
Dan Magenheimer <dan.magenheimer@...cle.com>,
Konrad Rzeszutek Wilk <konrad.wilk@...cle.com>,
linux-kernel@...r.kernel.org, linux-mm@...ck.org,
Andrew Morton <akpm@...ux-foundation.org>,
Robert Jennings <rcj@...ux.vnet.ibm.com>,
Nitin Gupta <ngupta@...are.org>, Alex Shi <alex.shi@...el.com>
Subject: Re: [PATCH 3/3] x86: add local_tlb_flush_kernel_range()
On 06/26/2012 01:14 AM, Seth Jennings wrote:
> This patch adds support for a local_tlb_flush_kernel_range()
> function for the x86 arch. This function allows for CPU-local
> TLB flushing, potentially using invlpg for single entry flushing,
> using an arch independent function name.
>
> Signed-off-by: Seth Jennings <sjenning@...ux.vnet.ibm.com>
Anyway, we don't matter INVLPG_BREAK_EVEN_PAGES's optimization point is 8 or something.
We do care only it works without big problem.
I believe after Alex's patch is settle down, we can fix it if it's wrong.
But it shouldn't prevent merging this patch.
Acked-by: Minchan Kim <minchan@...nel.org>
Nitpick: I expect you change __HAVE_LOCAL_XXX to __HAVE_ARCH_LOCAL_XXX in next spin. :)
> ---
> arch/x86/include/asm/tlbflush.h | 21 +++++++++++++++++++++
> 1 file changed, 21 insertions(+)
>
> diff --git a/arch/x86/include/asm/tlbflush.h b/arch/x86/include/asm/tlbflush.h
> index 36a1a2a..92a280b 100644
> --- a/arch/x86/include/asm/tlbflush.h
> +++ b/arch/x86/include/asm/tlbflush.h
> @@ -168,4 +168,25 @@ static inline void flush_tlb_kernel_range(unsigned long start,
> flush_tlb_all();
> }
>
> +#define __HAVE_LOCAL_FLUSH_TLB_KERNEL_RANGE
> +/*
> + * INVLPG_BREAK_EVEN_PAGES is the number of pages after which single tlb
> + * flushing becomes more costly than just doing a complete tlb flush.
> + * While this break even point varies among x86 hardware, tests have shown
> + * that 8 is a good generic value.
> +*/
> +#define INVLPG_BREAK_EVEN_PAGES 8
> +static inline void local_flush_tlb_kernel_range(unsigned long start,
> + unsigned long end)
> +{
> + if (cpu_has_invlpg &&
> + (end - start)/PAGE_SIZE <= INVLPG_BREAK_EVEN_PAGES) {
> + while (start < end) {
> + __flush_tlb_single(start);
> + start += PAGE_SIZE;
> + }
> + } else
> + local_flush_tlb();
> +}
> +
> #endif /* _ASM_X86_TLBFLUSH_H */
--
Kind regards,
Minchan Kim
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