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Message-ID: <20120628133650.6b7c8746@endymion.delvare>
Date: Thu, 28 Jun 2012 13:36:50 +0200
From: Jean Delvare <khali@...ux-fr.org>
To: Daniel Kurtz <djkurtz@...omium.org>
Cc: Ben Dooks <ben-linux@...ff.org>,
Wolfram Sang <w.sang@...gutronix.de>,
Seth Heasley <seth.heasley@...el.com>,
Olof Johansson <olof@...om.net>,
Benson Leung <bleung@...omium.org>, linux-i2c@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH 3/8 v3] i2c: i801: check INTR after every transaction
On Thu, 28 Jun 2012 15:51:34 +0800, Daniel Kurtz wrote:
> On Thu, Jun 28, 2012 at 12:07 AM, Jean Delvare <khali@...ux-fr.org> wrote:
> > On Wed, 27 Jun 2012 21:54:10 +0800, Daniel Kurtz wrote:
> >> +
> >> + if (timeout > MAX_RETRIES)
> >> + dev_dbg(&priv->pci_dev->dev, "INTR Timeout!\n");
> >> +
> >> + outb_p(status, SMBHSTSTS(priv));
> >
> > Wouldn't it be more correct to only write the INTR bit? Writing back
> > the whole 8 bits frightens me a little especially because of bit
> > INUSE_STS. If we ever want to support this feature, I think we have to
> > first ban writing back the whole status to register HST_STS. And this
> > is the only place where we still do AFAICS.
>
> It looks like the current code does it this way to clear any error
> bits that may be set in the timeout case (errors set, but no INTR).
> For example, if there was a bus / arbitration error while waiting for
> PEC.
>
> Perhaps we can split the difference (I tested this and it has no
> obvious regression):
>
> + /* Clear INTR, or in case of timeout, any other status bits. */
> + outb_p(status & STATUS_FLAGS, SMBHSTSTS(priv));
>
> But in a separate patch...
>
I agree, this would be a reasonable compromise.
--
Jean Delvare
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