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Message-ID: <4FEBBB5C.5000505@intel.com>
Date: Thu, 28 Jun 2012 10:03:08 +0800
From: Alex Shi <alex.shi@...el.com>
To: Seth Jennings <sjenning@...ux.vnet.ibm.com>
CC: Dan Magenheimer <dan.magenheimer@...cle.com>,
Minchan Kim <minchan@...nel.org>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
devel@...verdev.osuosl.org, Konrad Wilk <konrad.wilk@...cle.com>,
linux-kernel@...r.kernel.org, linux-mm@...ck.org,
Andrew Morton <akpm@...ux-foundation.org>,
Robert Jennings <rcj@...ux.vnet.ibm.com>,
Nitin Gupta <ngupta@...are.org>,
"H. Peter Anvin" <hpa@...or.com>
Subject: Re: [PATCH 3/3] x86: add local_tlb_flush_kernel_range()
On 06/28/2012 02:33 AM, Seth Jennings wrote:
> On 06/27/2012 10:12 AM, Dan Magenheimer wrote:
>>> From: Minchan Kim [mailto:minchan@...nel.org]
>>> Subject: Re: [PATCH 3/3] x86: add local_tlb_flush_kernel_range()
>>>
>>> On 06/27/2012 03:14 PM, Alex Shi wrote:
>>>>
>>>> On 06/27/2012 01:53 PM, Minchan Kim wrote:
>>>> Different CPU type has different balance point on the invlpg replacing
>>>> flush all. and some CPU never get benefit from invlpg, So, it's better
>>>> to use different value for different CPU, not a fixed
>>>> INVLPG_BREAK_EVEN_PAGES.
>>>
>>> I think it could be another patch as further step and someone who are
>>> very familiar with architecture could do better than.
>>> So I hope it could be merged if it doesn't have real big problem.
>>>
>>> Thanks for the comment, Alex.
>>
>> Just my opinion, but I have to agree with Alex. Hardcoding
>> behavior that is VERY processor-specific is a bad idea. TLBs should
>> only be messed with when absolutely necessary, not for the
>> convenience of defending an abstraction that is nice-to-have
>> but, in current OS kernel code, unnecessary.
>
> I agree that it's not optimal. The selection based on CPUID
> is part of Alex's patchset, and I'll be glad to use that
> code when it gets integrated.
>
> But the real discussion is are we going to:
> 1) wait until Alex's patches to be integrated, degrading
> zsmalloc in the meantime or
Peter Anvin is merging my TLB patch set into tip tree, x86/mm branch.
> 2) put in some simple temporary logic that works well (not
> best) for most cases
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