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Message-ID: <1341256733.23484.11.camel@twins>
Date: Mon, 02 Jul 2012 21:18:53 +0200
From: Peter Zijlstra <a.p.zijlstra@...llo.nl>
To: Andi Kleen <andi@...stfloor.org>
Cc: x86@...nel.org, linux-kernel@...r.kernel.org,
Andi Kleen <ak@...ux.intel.com>
Subject: Re: [PATCH 2/5] perf, x86: Enable PDIR precise instruction
profiling on IvyBridge
On Mon, 2012-07-02 at 11:43 -0700, Andi Kleen wrote:
> From: Andi Kleen <ak@...ux.intel.com>
>
> Even with precise profiling Intel CPUs have a "skid". The sample
> triggers a few cycles later than the instruction, so in some
> cases there can be systematic errors where expensive instructions never
> show up in the profile log.
>
> Sandy Bridge added a new PDIR instruction retired event that randomizes
> the sampling slightly. This corrects for systematic errors, so that
> you should in most cases see the correct instruction getting profile hits.
>
> Unfortunately the SandyBridge version could only work with a otherwise
> quiescent CPU and was difficult to use. But now on IvyBridge this
> restriction is gone and can be more widely used.
>
> This only works for retired instructions.
>
> I enabled it -- somewhat arbitarily -- for two 'p's or more.
>
> To use it
>
> perf record -e instructions:pp ...
>
> This provides a more precise alternative to the usual cycles:pp,
> however it will not account for expensive instructions.
Already told you no.
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