linux-kernel - Re: [PATCH 2/5] perf, x86: Enable PDIR precise instruction profiling on IvyBridge

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Message-ID: <CABPqkBSdtV6FTqVestcmy_skyK5AFTeShoT6vDFk34A0XaXWDA@mail.gmail.com>
Date:	Tue, 3 Jul 2012 01:13:22 +0200
From:	Stephane Eranian <eranian@...gle.com>
To:	Andi Kleen <ak@...ux.intel.com>
Cc:	Peter Zijlstra <a.p.zijlstra@...llo.nl>,
	Andi Kleen <andi@...stfloor.org>, x86@...nel.org,
	linux-kernel@...r.kernel.org, Jiri Olsa <jolsa@...hat.com>
Subject: Re: [PATCH 2/5] perf, x86: Enable PDIR precise instruction profiling
 on IvyBridge

On Mon, Jul 2, 2012 at 11:57 PM, Andi Kleen <ak@...ux.intel.com> wrote:
> On Mon, Jul 02, 2012 at 11:36:54PM +0200, Peter Zijlstra wrote:
>> On Mon, 2012-07-02 at 14:00 -0700, Andi Kleen wrote:
>> > Ok so you want a new flag? Or a new event?
>>
>> Once we grow the sysfs event stuff for cpu PMUs, we could add a new
>> named event, but I don't think its all that important.
>>
>> instructions isn't all that interesting a measure to sample. And the
>> people that do care can already use it by filling out the event
>> manually.
>
> The idea was to make it easier to use, similar to the recent
> automatic IBS setup on AMD.
>
> It's the nearest you can get on Intel systems.
>
> I agree it would be nicer on cycles, but instructions are in many
> cases a reasonable approximation.
>
> BTW the problem with specifying it manually is that there
> is no way to enforce the SandyBridge quiescence restrictions.

Well, the only way I can think of would be to request that the
event be programmed with exclusive mode ALWAYS. That
should not be to hard to add.

> It would probably need forking the tables too and removing it on
> SandyBridge, or something special to enforce exclusive mode,
> all complicated and ugly.
>
> An explicit way to specify it side steps that all nicely.
>
> -Andi
>
> --
> ak@...ux.intel.com -- Speaking for myself only
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