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Message-ID: <4FF2BF3E.90803@amd.com>
Date: Tue, 3 Jul 2012 11:45:34 +0200
From: Christoph Egger <Christoph.Egger@....com>
To: Jan Beulich <JBeulich@...e.com>
CC: Jinsong Liu <jinsong.liu@...el.com>,
IanCampbell <Ian.Campbell@...rix.com>,
Ashok Raj <ashok.raj@...el.com>,
Donald D Dugger <donald.d.dugger@...el.com>,
Haitao Shan <haitao.shan@...el.com>,
Jun Nakajima <jun.nakajima@...el.com>,
Susie Li <susie.li@...el.com>, Tony Luck <tony.luck@...el.com>,
Will Auld <will.auld@...el.com>,
Xiantao Zhang <xiantao.zhang@...el.com>,
Yunhong Jiang <yunhong.jiang@...el.com>,
"xen-devel@...ts.xensource.com" <xen-devel@...ts.xensource.com>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
KeirFraser <keir@....org>
Subject: Re: [Xen-devel] [xen vMCE RFC V0.2] xen vMCE design
On 07/03/12 09:16, Jan Beulich wrote:
>>>> On 02.07.12 at 19:32, "Liu, Jinsong" <jinsong.liu@...el.com> wrote:
>> Thanks AMD's feedback :)
>>
>> This vMCE design foils is basically for Intel MCA, involving many details
>> specific to Intel.
>> I agree that for x86 Intel and AMD can share logic in many fields. However,
>> for MCA logic Intel and AMD are quite different, like
>> 1. MSRs interface, e.g. MCG_CAP, MCi_MICS, MCi_CTL2, etc;
>> 2. error injection, AMD provide NMI/single MCE/broadcast MCE, while in our
>> design only concern broadcast MCE# (and pretend to expose CMCI);
>> 3. MCE handler: currently in xen Intel and AMD mce use different triggle
>> method and mce handler;
>>
>> Considering the big difference, I suggest we separately provide Intel vMCE
>> and AMD vMCE (i.e. vmce_intel.c and vmce_amd.c).
>
> I'm not convinced of the need, and would prefer aiming at a
> shared implementation unless issues arise that make this
> impossible.
I have patches ready that do that. About 80% of mce_intel.c is not
Intel specific. I am just waiting for the feature freeze to end...
Christoph
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