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Message-ID: <20120709182018.18165.98339.stgit@bhelgaas.mtv.corp.google.com>
Date: Mon, 09 Jul 2012 12:20:18 -0600
From: Bjorn Helgaas <bhelgaas@...gle.com>
To: linux-pci@...r.kernel.org
Cc: Jacob Pan <jacob.jun.pan@...ux.intel.com>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
linux-kernel@...r.kernel.org,
Jesse Barnes <jbarnes@...tuousgeek.org>,
Ivan Kokshaysky <ink@...assic.park.msu.ru>,
Matthew Wilcox <matthew.r.wilcox@...el.com>,
Robert Hancock <hancockrwd@...il.com>
Subject: [PATCH 1/2] PCI: leave MEM and IO decoding disabled during 64-bit BAR
sizing, too
After 253d2e5498, we disable MEM and IO decoding for most devices while we
size 32-bit BARs. However, we restore the original COMMAND register before
we size the upper 32 bits of 64-bit BARs, so we can still cause a conflict.
This patch waits to restore the original COMMAND register until we're
completely finished sizing the BAR.
Reference: https://lkml.org/lkml/2007/8/25/154
Signed-off-by: Bjorn Helgaas <bhelgaas@...gle.com>
---
drivers/pci/probe.c | 6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index 658ac97..66b3a6f 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -152,9 +152,6 @@ int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
pci_read_config_dword(dev, pos, &sz);
pci_write_config_dword(dev, pos, l);
- if (!dev->mmio_always_on)
- pci_write_config_word(dev, PCI_COMMAND, orig_cmd);
-
/*
* All bits set in sz means the device isn't working properly.
* If the BAR isn't implemented, all bits must be 0. If it's a
@@ -239,6 +236,9 @@ int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
}
out:
+ if (!dev->mmio_always_on)
+ pci_write_config_word(dev, PCI_COMMAND, orig_cmd);
+
return (res->flags & IORESOURCE_MEM_64) ? 1 : 0;
fail:
res->flags = 0;
--
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