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Message-ID: <CAErSpo6aOq5Ph9yJ_Oa2Uo2TBdvG9MbXcZe8zrXVOU4=Dne4Xw@mail.gmail.com>
Date: Mon, 9 Jul 2012 21:23:03 -0600
From: Bjorn Helgaas <bhelgaas@...gle.com>
To: linux-pci@...r.kernel.org
Cc: Jacob Pan <jacob.jun.pan@...ux.intel.com>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
linux-kernel@...r.kernel.org,
Jesse Barnes <jbarnes@...tuousgeek.org>,
Ivan Kokshaysky <ink@...assic.park.msu.ru>,
Matthew Wilcox <matthew.r.wilcox@...el.com>,
Robert Hancock <hancockrwd@...il.com>
Subject: Re: [PATCH 0/2] PCI: decode disable fixes
On Mon, Jul 9, 2012 at 12:20 PM, Bjorn Helgaas <bhelgaas@...gle.com> wrote:
> Since 2.6.36 (253d2e5498), we've disabled MEM & IO decoding while we size
> BARs (except for host bridge devices). These patches tweak this in two
> ways:
>
> 1) We only kept decoding disabled while sizing the low-order dword
> of 64-bit BARs. I think we should keep it disabled while we do the
> high-order dword also.
>
> 2) I think we should also disable decoding while updating 64-bit BARs,
> e.g., when we move a device into an aperture of an upstream bridge. I'm
> only proposing to disable decoding for 64-bit BAR updates because 32-bit
> ones can be done atomically, while 64-bit updates require two writes and
> the half-written state is a potential problem.
>
> I'm considering these changes for the 3.6 merge window, which is
> approaching fast, so let me know if you see issues with either of these.
>
> ---
>
> Bjorn Helgaas (2):
> PCI: leave MEM and IO decoding disabled during 64-bit BAR sizing, too
> PCI: disable MEM decoding while updating 64-bit MEM BARs
>
>
> drivers/pci/probe.c | 6 +++---
> drivers/pci/setup-res.c | 18 ++++++++++++++++++
> 2 files changed, 21 insertions(+), 3 deletions(-)
I applied these to my "next" branch.
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