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Date:	Wed, 11 Jul 2012 20:02:51 +0800
From:	"Yan, Zheng" <zheng.z.yan@...ux.intel.com>
To:	Peter Zijlstra <a.p.zijlstra@...llo.nl>
Cc:	"Yan, Zheng" <zheng.z.yan@...el.com>, eranian@...gle.com,
	mingo@...e.hu, andi@...stfloor.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH V2 5/5] perf/x86: Add Intel Nehalem-EX uncore support

On Wed, Jul 11, 2012 at 5:57 PM, Peter Zijlstra <a.p.zijlstra@...llo.nl> wrote:
> On Wed, 2012-07-11 at 10:06 +0800, Yan, Zheng wrote:
>> This doesn't work. The MSRs for Cbox 8/9 in WSM-EX aren't contiguous with
>> Cbox 0~7.
>
> Argh!
>
>>  Furthermore the encoding for the FVC register in the Mbox are
>> different between NHM-EX and WSM-EX.
>
> OK, 18.7.1 from Vol. 3B doesn't mention that.. where did you find this?
>

Table 2-80 in <<Intel Xeon Processor 7500 Series Uncore Programming Guide>> and
<<Intel Xeon Processor E7 Family Uncore Performance Monitoring
Programming Guide>>.
The fvid field in NHM-EX is 5 bits, in WSM-EX is 6 bits.

Thanks
Yan, Zheng
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