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Message-ID: <CAOh2x=kkjgPx0Bd7JLgDm+wkCXoWc7Ti2Eq8DXkDepV2nDyp_A@mail.gmail.com>
Date: Fri, 13 Jul 2012 09:27:20 +0100
From: viresh kumar <viresh.kumar@...aro.org>
To: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
Cc: linux-kernel@...r.kernel.org, Vinod Koul <vinod.koul@...el.com>,
Dan Williams <dan.j.williams@...el.com>,
spear-devel <spear-devel@...t.st.com>
Subject: Re: [PATCH 2/3] dw_dmac: use 'u32' for LLI structure members, not dma_addr_t
On Fri, Jul 13, 2012 at 9:09 AM, Andy Shevchenko
<andriy.shevchenko@...ux.intel.com> wrote:
> Use 'u32' for the LLI structure members, which are defined by hardware to be
> 32-bit. dma_addr_t is much more vague about its actual size.
>
> Signed-off-by: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
> ---
> drivers/dma/dw_dmac.c | 7 ++-----
> drivers/dma/dw_dmac_regs.h | 6 +++---
> 2 files changed, 5 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/dma/dw_dmac.c b/drivers/dma/dw_dmac.c
> index db56ef4..3d061c6 100644
> --- a/drivers/dma/dw_dmac.c
> +++ b/drivers/dma/dw_dmac.c
> @@ -416,11 +416,8 @@ static void dwc_scan_descriptors(struct dw_dma *dw, struct dw_dma_chan *dwc)
> static inline void dwc_dump_lli(struct dw_dma_chan *dwc, struct dw_lli *lli)
> {
> dev_printk(KERN_CRIT, chan2dev(&dwc->chan),
> - " desc: s0x%llx d0x%llx l0x%llx c0x%x:%x\n",
> - (unsigned long long)lli->sar,
> - (unsigned long long)lli->dar,
> - (unsigned long long)lli->llp,
> - lli->ctlhi, lli->ctllo);
> + " desc: s0x%x d0x%x l0x%x c0x%x:%x\n",
> + lli->sar, lli->dar, lli->llp, lli->ctlhi, lli->ctllo);
> }
>
> static void dwc_handle_error(struct dw_dma *dw, struct dw_dma_chan *dwc)
> diff --git a/drivers/dma/dw_dmac_regs.h b/drivers/dma/dw_dmac_regs.h
> index e248481..50830be 100644
> --- a/drivers/dma/dw_dmac_regs.h
> +++ b/drivers/dma/dw_dmac_regs.h
> @@ -219,9 +219,9 @@ static inline struct dw_dma *to_dw_dma(struct dma_device *ddev)
> /* LLI == Linked List Item; a.k.a. DMA block descriptor */
> struct dw_lli {
> /* values that are not changed by hardware */
> - dma_addr_t sar;
> - dma_addr_t dar;
> - dma_addr_t llp; /* chain to next lli */
> + u32 sar;
> + u32 dar;
> + u32 llp; /* chain to next lli */
> u32 ctllo;
> /* values that may get written back: */
> u32 ctlhi;
Acked-by: Viresh Kumar <viresh.kumar@...aro.org>
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