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Message-Id: <201207170802.56434.arnd@arndb.de>
Date: Tue, 17 Jul 2012 08:02:55 +0000
From: Arnd Bergmann <arnd@...db.de>
To: Jon Masters <jonathan@...masters.org>
Cc: Pavel Machek <pavel@....cz>,
Catalin Marinas <catalin.marinas@....com>,
Ingo Molnar <mingo@...nel.org>,
Olof Johansson <olof@...om.net>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
Linus Torvalds <torvalds@...ux-foundation.org>,
Russell King <linux@....linux.org.uk>,
Andrew Morton <akpm@...ux-foundation.org>,
Alan Cox <alan@...rguk.ukuu.org.uk>
Subject: Re: [PATCH 00/36] AArch64 Linux kernel port
On Tuesday 17 July 2012, Jon Masters wrote:
> On 07/16/2012 08:16 AM, Pavel Machek wrote:
>
> >> If an implementation supports AArch32 at EL3 there could be some
> >> physical (or some FPGA config) switch to choose between the two. But
> >> since AArch64 is mandated, I don't see why one would force AArch32 at
> >> EL3 and therefore all lower exception levels (and make a big part of the
> >> processor unused).
> >
> > Actually I see one ... and I can bet it will happen.
> >
> > So you create that shiny new ARMv8 compliant CPU, 8 cores, 2GHz. HTC
> > will want to use it with 1GB of RAM... and put around exiting OMAP
> > perihepals.
>
> But that's why we have Eagle (A15). It's a very capable 32-bit design
> from ARM and far more sensible for such designs. You can easily build
> something with a few A15 clusters in it, as we're already seeing.
Right, I would say that with any CPU core more powerful than this one
or with more than a few of these, you will also have trouble coming
up with workloads that really require the CPU performance but don't
also require a 64 bit virtual address space in either user space
or kernel.
Arnd
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