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Message-ID: <500904B2.1030505@jonmasters.org>
Date: Fri, 20 Jul 2012 03:11:46 -0400
From: Jon Masters <jonathan@...masters.org>
To: Will Deacon <will.deacon@....com>
CC: Catalin Marinas <Catalin.Marinas@....com>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
Arnd Bergmann <arnd@...db.de>
Subject: Re: [PATCH 08/36] AArch64: Kernel booting and initialisation
On 07/18/2012 05:07 AM, Will Deacon wrote:
> On Wed, Jul 18, 2012 at 07:57:47AM +0100, Jon Masters wrote:
>> On 07/06/2012 05:05 PM, Catalin Marinas wrote:
>>
>>> +- CPU mode
>>> + All forms of interrupts must be masked in PSTATE.DAIF (Debug, SError,
>>> + IRQ and FIQ).
>>> + The CPU must be in either EL2 (RECOMMENDED) or non-secure EL1.
>>
>> Even though this stuff is likely to be replaced with the result of some
>> of the other standardization, I'd like it if you'd strongly consider
>> removing the "or non-secure EL1". If you give an inch, someone will take
>> a mile and build a system that enters other than in EL2. Or, something
>> to the effect of "the highest non-secure exception level implemented"
>> would be my preference if you don't want to specify.
>
> The reason we allow kernels to boot at non-secure EL1 is because we require
> that for booting Linux as a guest OS under a hypervisor.
Good point. Found brain on switch after I wrote that (was only thinking
from the point of view of the hypervisor itself, not the guest).
Jon.
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