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Message-Id: <1343148077-25941-9-git-send-email-jiang.liu@huawei.com>
Date: Wed, 25 Jul 2012 00:41:17 +0800
From: Jiang Liu <liuj97@...il.com>
To: Bjorn Helgaas <bhelgaas@...gle.com>,
Don Dutile <ddutile@...hat.com>
Cc: Jiang Liu <jiang.liu@...wei.com>, Yinghai Lu <yinghai@...nel.org>,
Taku Izumi <izumi.taku@...fujitsu.com>,
"Rafael J . Wysocki" <rjw@...k.pl>,
Kenji Kaneshige <kaneshige.kenji@...fujitsu.com>,
Yijing Wang <wangyijing@...wei.com>,
linux-kernel@...r.kernel.org, linux-pci@...r.kernel.org,
Jiang Liu <liuj97@...il.com>
Subject: [RFC PATCH v2 32/32] PCI/rtl8192e: use PCIe capabilities access functions to simplify implementation
From: Jiang Liu <jiang.liu@...wei.com>
Use PCIe capabilities access functions to simplify rtl8192e driver's
implementation.
Signed-off-by: Jiang Liu <liuj97@...il.com>
---
drivers/staging/rtl8192e/rtl8192e/rtl_pci.c | 8 +++-----
1 file changed, 3 insertions(+), 5 deletions(-)
diff --git a/drivers/staging/rtl8192e/rtl8192e/rtl_pci.c b/drivers/staging/rtl8192e/rtl8192e/rtl_pci.c
index ddadcc3..820cc68 100644
--- a/drivers/staging/rtl8192e/rtl8192e/rtl_pci.c
+++ b/drivers/staging/rtl8192e/rtl8192e/rtl_pci.c
@@ -31,12 +31,10 @@ static void rtl8192_parse_pci_configuration(struct pci_dev *pdev,
struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
u8 tmp;
- int pos;
- u8 LinkCtrlReg;
+ u16 LinkCtrlReg;
- pos = pci_find_capability(priv->pdev, PCI_CAP_ID_EXP);
- pci_read_config_byte(priv->pdev, pos + PCI_EXP_LNKCTL, &LinkCtrlReg);
- priv->NdisAdapter.LinkCtrlReg = LinkCtrlReg;
+ pci_pcie_capability_read_word(priv->pdev, PCI_EXP_LNKCTL, &LinkCtrlReg);
+ priv->NdisAdapter.LinkCtrlReg = (u8)LinkCtrlReg;
RT_TRACE(COMP_INIT, "Link Control Register =%x\n",
priv->NdisAdapter.LinkCtrlReg);
--
1.7.9.5
--
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