linux-kernel - Re: [PATCH V2] dma: tegra: enable/disable dma clock

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Date:	Tue, 24 Jul 2012 10:38:18 +0530
From:	Vinod Koul <vinod.koul@...ux.intel.com>
To:	Laxman Dewangan <ldewangan@...dia.com>
Cc:	dan.j.williams@...el.com, swarren@...dia.com,
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH V2] dma: tegra: enable/disable dma clock

On Fri, 2012-07-20 at 13:31 +0530, Laxman Dewangan wrote:
> Enable the DMA clock when allocating channel and
> disable clock when freeing channels.
> 
> Signed-off-by: Laxman Dewangan <ldewangan@...dia.com>
> ---
> Changes from V1 to V2:
> - Enable/disable clock when allocating/freeing channels.
> - rewrite the description to reflect change.
> 
>  drivers/dma/tegra20-apb-dma.c |   18 +++++++++++++++++-
>  1 files changed, 17 insertions(+), 1 deletions(-)
> 
> diff --git a/drivers/dma/tegra20-apb-dma.c b/drivers/dma/tegra20-apb-dma.c
> index d52dbc6..24acd71 100644
> --- a/drivers/dma/tegra20-apb-dma.c
> +++ b/drivers/dma/tegra20-apb-dma.c
> @@ -1119,15 +1119,21 @@ struct dma_async_tx_descriptor *tegra_dma_prep_dma_cyclic(
>  static int tegra_dma_alloc_chan_resources(struct dma_chan *dc)
>  {
>  	struct tegra_dma_channel *tdc = to_tegra_dma_chan(dc);
> +	struct tegra_dma *tdma = tdc->tdma;
> +	int ret;
>  
>  	dma_cookie_init(&tdc->dma_chan);
>  	tdc->config_init = false;
> -	return 0;
> +	ret = clk_prepare_enable(tdma->dma_clk);
> +	if (ret < 0)
> +		dev_err(tdc2dev(tdc), "clk_prepare_enable failed: %d\n", ret);
> +	return ret;
>  }
>  
>  static void tegra_dma_free_chan_resources(struct dma_chan *dc)
>  {
>  	struct tegra_dma_channel *tdc = to_tegra_dma_chan(dc);
> +	struct tegra_dma *tdma = tdc->tdma;
>  
>  	struct tegra_dma_desc *dma_desc;
>  	struct tegra_dma_sg_req *sg_req;
> @@ -1163,6 +1169,7 @@ static void tegra_dma_free_chan_resources(struct dma_chan *dc)
>  		list_del(&sg_req->node);
>  		kfree(sg_req);
>  	}
> +	clk_disable_unprepare(tdma->dma_clk);
What if another channel is active, disabling clock can cause bad
behavior. You should check here if all channels are idle and then
disable, or is this handled by clock API?
>  }
>  
>  /* Tegra20 specific DMA controller information */
> @@ -1255,6 +1262,13 @@ static int __devinit tegra_dma_probe(struct platform_device *pdev)
>  		}
>  	}
>  
> +	/* Enable clock before accessing registers */
> +	ret = clk_prepare_enable(tdma->dma_clk);
> +	if (ret < 0) {
> +		dev_err(&pdev->dev, "clk_prepare_enable failed: %d\n", ret);
> +		goto err_pm_disable;
> +	}
> +
>  	/* Reset DMA controller */
>  	tegra_periph_reset_assert(tdma->dma_clk);
>  	udelay(2);
> @@ -1265,6 +1279,8 @@ static int __devinit tegra_dma_probe(struct platform_device *pdev)
>  	tdma_write(tdma, TEGRA_APBDMA_CONTROL, 0);
>  	tdma_write(tdma, TEGRA_APBDMA_IRQ_MASK_SET, 0xFFFFFFFFul);
>  
> +	clk_disable_unprepare(tdma->dma_clk);
> +
>  	INIT_LIST_HEAD(&tdma->dma_dev.channels);
>  	for (i = 0; i < cdata->nr_channels; i++) {
>  		struct tegra_dma_channel *tdc = &tdma->channels[i];


-- 
~Vinod

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