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Date:	Wed, 25 Jul 2012 09:39:38 -0400
From:	Christopher Covington <cov@...eaurora.org>
To:	Catalin Marinas <catalin.marinas@....com>
CC:	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	Arnd Bergmann <arnd@...db.de>,
	Will Deacon <Will.Deacon@....com>,
	Marc Zyngier <marc.zyngier@....com>
Subject: Re: [08/36] AArch64: Kernel booting and initialisation

On 07/25/2012 04:47 AM, Catalin Marinas wrote:
> On Tue, Jul 24, 2012 at 08:42:28PM +0100, Christopher Covington wrote:
>> On 01/-10/-28163 02:59 PM, Catalin Marinas wrote:
>>> +- Architected timers
>>> +  CNTFRQ must be programmed with the timer frequency.
>>> +  If entering the kernel at EL1, CNTHCTL_EL2 must have EL1PCTEN (bit 0)
>>> +  set where available.
>>
>> After Marc Zyngier's virtual timer patches come in, will the latter
>> requirement only be strictly necessary for kernels wanting to do
>> virtualization?
> 
> A kernel is usually entered at EL1 (rather than EL2) if it is a guest.
> In this case, the EL1PCTEN bit should have been enabled from the higher
> level to give access to the physical counter.

Ah right, those patches still use the physical counter for the
clocksource and cyclecounter interfaces.

Thanks,
Christopher

-- 
Employee of Qualcomm Innovation Center, Inc.
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum
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