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Message-ID: <1343706583.27983.28.camel@gandalf.stny.rr.com>
Date:	Mon, 30 Jul 2012 23:49:43 -0400
From:	Steven Rostedt <rostedt@...dmis.org>
To:	"Srivatsa S. Bhat" <srivatsa.bhat@...ux.vnet.ibm.com>
Cc:	tglx@...utronix.de, mingo@...nel.org, paulmck@...ux.vnet.ibm.com,
	josh@...htriplett.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] preempt/hardirq.h: Fix comment about PREEMPT_ACTIVE bit
 location

On Sat, 2012-07-21 at 00:54 +0530, Srivatsa S. Bhat wrote:
> PREEMPT_ACTIVE flag is bit 27, not 28. Fix the comment.
> 
> Signed-off-by: Srivatsa S. Bhat <srivatsa.bhat@...ux.vnet.ibm.com>
> ---
> 
>  include/linux/hardirq.h |    2 +-
>  1 files changed, 1 insertions(+), 1 deletions(-)
> 
> diff --git a/include/linux/hardirq.h b/include/linux/hardirq.h
> index bb7f309..305f23c 100644
> --- a/include/linux/hardirq.h
> +++ b/include/linux/hardirq.h
> @@ -22,7 +22,7 @@
>   *
>   * - bits 16-25 are the hardirq count (max # of nested hardirqs: 1024)
>   * - bit 26 is the NMI_MASK
> - * - bit 28 is the PREEMPT_ACTIVE flag
> + * - bit 27 is the PREEMPT_ACTIVE flag

Sorry but in arch/x86/include/asm/thread_info.h we have:

#define PREEMPT_ACTIVE		0x10000000

Which happens to be the 28th bit, not 27th. Although, if an arch did not
define PREEMPT_ACTIVE it would be 27th.

Perhaps the correct thing to do is to say:

  By default the following bits are defined as:
	[...]
  Different architectures may modify these.

And then add your change.

-- Steve

>   *
>   * PREEMPT_MASK: 0x000000ff
>   * SOFTIRQ_MASK: 0x0000ff00


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