linux-kernel - RE: [PATCH v3 29/32] PCI/radeon: use PCIe capabilities access functions to simplify implementation

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Date:	Wed, 1 Aug 2012 16:04:35 +0000
From:	"Deucher, Alexander" <Alexander.Deucher@....com>
To:	Jiang Liu <liuj97@...il.com>, Bjorn Helgaas <bhelgaas@...gle.com>,
	Don Dutile <ddutile@...hat.com>,
	David Airlie <airlied@...ux.ie>,
	Dave Airlie <airlied@...hat.com>,
	Jerome Glisse <jglisse@...hat.com>
CC:	Jiang Liu <jiang.liu@...wei.com>, Yinghai Lu <yinghai@...nel.org>,
	Taku Izumi <izumi.taku@...fujitsu.com>,
	"Rafael J . Wysocki" <rjw@...k.pl>,
	Kenji Kaneshige <kaneshige.kenji@...fujitsu.com>,
	Yijing Wang <wangyijing@...wei.com>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>
Subject: RE: [PATCH v3 29/32] PCI/radeon: use PCIe capabilities access
 functions to simplify implementation

> -----Original Message-----
> From: Jiang Liu [mailto:liuj97@...il.com]
> Sent: Wednesday, August 01, 2012 11:55 AM
> To: Bjorn Helgaas; Don Dutile; David Airlie; Dave Airlie; Deucher, Alexander;
> Jerome Glisse
> Cc: Jiang Liu; Yinghai Lu; Taku Izumi; Rafael J . Wysocki; Kenji Kaneshige; Yijing
> Wang; linux-kernel@...r.kernel.org; linux-pci@...r.kernel.org; Jiang Liu
> Subject: [PATCH v3 29/32] PCI/radeon: use PCIe capabilities access functions
> to simplify implementation
> 
> From: Jiang Liu <jiang.liu@...wei.com>
> 
> Use PCIe capabilities access functions to simplify radeon driver's
> implementation.
> 
> Signed-off-by: Jiang Liu <liuj97@...il.com>

Reviewed-by: Alex Deucher <alexander.deucher@....com>

> ---
>  drivers/gpu/drm/radeon/evergreen.c |   10 +++-------
>  1 file changed, 3 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/gpu/drm/radeon/evergreen.c
> b/drivers/gpu/drm/radeon/evergreen.c
> index 01550d0..8804c80 100644
> --- a/drivers/gpu/drm/radeon/evergreen.c
> +++ b/drivers/gpu/drm/radeon/evergreen.c
> @@ -77,13 +77,9 @@ void evergreen_tiling_fields(unsigned tiling_flags,
> unsigned *bankw,
>  void evergreen_fix_pci_max_read_req_size(struct radeon_device *rdev)
>  {
>  	u16 ctl, v;
> -	int cap, err;
> +	int err;
> 
> -	cap = pci_pcie_cap(rdev->pdev);
> -	if (!cap)
> -		return;
> -
> -	err = pci_read_config_word(rdev->pdev, cap + PCI_EXP_DEVCTL,
> &ctl);
> +	err = pci_pcie_capability_read_word(rdev->pdev, PCI_EXP_DEVCTL,
> &ctl);
>  	if (err)
>  		return;
> 
> @@ -95,7 +91,7 @@ void evergreen_fix_pci_max_read_req_size(struct
> radeon_device *rdev)
>  	if ((v == 0) || (v == 6) || (v == 7)) {
>  		ctl &= ~PCI_EXP_DEVCTL_READRQ;
>  		ctl |= (2 << 12);
> -		pci_write_config_word(rdev->pdev, cap + PCI_EXP_DEVCTL,
> ctl);
> +		pci_pcie_capability_write_word(rdev->pdev,
> PCI_EXP_DEVCTL, ctl);
>  	}
>  }
> 
> --
> 1.7.9.5
> 


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