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Message-ID: <20120813150955.GD5248@phenom.ffwll.local>
Date: Mon, 13 Aug 2012 17:09:55 +0200
From: Daniel Vetter <daniel@...ll.ch>
To: Mihai Moldovan <ionic@...ic.de>
Cc: Jani Nikula <jani.nikula@...el.com>, daniel@...ll.ch,
intel-gfx@...ts.freedesktop.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 0/1] hopefully fix null pointer dereference on i915 load
On Mon, Aug 13, 2012 at 05:03:24PM +0200, Mihai Moldovan wrote:
> Hi Jani,
>
> * On 13.08.2012 04:33 PM, Jani Nikula wrote:
> > Hi Mihai, could you test the following patch to see if it fixes the problem,
> > please?
> >
> > BR,
> > Jani.
> >
> >
> > Jani Nikula (1):
> > drm/i915: ensure i2c adapter is all set before adding it
> >
> > drivers/gpu/drm/i915/intel_i2c.c | 7 ++++---
> > 1 file changed, 4 insertions(+), 3 deletions(-)
> >
>
> The reason sounds sane to me, but while looking through the code, I have seen a
> few other problems, too.
>
> To my understanding, we should use port for dev_priv->gmbus[], not the pin
> mapping (which is only used for gmbus_ports[]).
> Don't forget to add the +1 for pin -> port mapping to the error case.
>
> Also, intel_gmbus_get_adapter is already accepting a port value (I made sure to
> look at the calls in other files too), so don't map the port back to a pin.
>
> Keep the same in mind for the intel_teardown_gmbus "destructor".
>
> The current code adds the gmbus algorithm (gmbus_xfer) to gmbus port 0, which is
> known as "disabled" and shouldn't be used (previously has_gpio was set to false
> for those ports to not do any transfer on those ports.)
>
> I may be wrong, could you review this and maybe add it to your patch?
This seems to essentially undo
commit 2ed06c93a1fce057808894d73167aae03c76deaf
Author: Daniel Kurtz <djkurtz@...omium.org>
Date: Wed Mar 28 02:36:15 2012 +0800
drm/i915/intel_i2c: gmbus disabled and reserved ports are invalid
Note that port numbers start at 1, whereas the array is 0-index based. So
you patch here would blow up if you don't extend the dev_priv->gmbus
array.
Yours, Daniel
--
Daniel Vetter
Mail: daniel@...ll.ch
Mobile: +41 (0)79 365 57 48
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