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Message-ID: <20120813162753.GM2644@tassilo.jf.intel.com>
Date: Mon, 13 Aug 2012 09:27:53 -0700
From: Andi Kleen <ak@...ux.intel.com>
To: "Kirill A. Shutemov" <kirill.shutemov@...ux.intel.com>
Cc: Jan Beulich <JBeulich@...e.com>,
Andy Lutomirski <luto@...capital.net>,
Robert Richter <robert.richter@....com>,
Johannes Weiner <hannes@...xchg.org>,
Hugh Dickins <hughd@...gle.com>, Alex Shi <alex.shu@...el.com>,
KAMEZAWA Hiroyuki <kamezawa.hiroyu@...fujitsu.com>,
x86@...nel.org, linux-mm@...ck.org,
Thomas Gleixner <tglx@...utronix.de>,
Andrew Morton <akpm@...ux-foundation.org>,
linux-mips@...ux-mips.org, Tim Chen <tim.c.chen@...ux.intel.com>,
linuxppc-dev@...ts.ozlabs.org,
Andrea Arcangeli <aarcange@...hat.com>,
Ingo Molnar <mingo@...hat.com>, Mel Gorman <mgorman@...e.de>,
linux-kernel@...r.kernel.org, linux-sh@...r.kernel.org,
sparclinux@...r.kernel.org, "H. Peter Anvin" <hpa@...or.com>
Subject: Re: [PATCH v2 4/6] x86: Add clear_page_nocache
> Moving 64 bytes per cycle is faster on Sandy Bridge, but slower on
> Westmere. Any preference? ;)
You have to be careful with these benchmarks.
- You need to make sure the data is cache cold, cache hot is misleading.
- The numbers can change if you have multiple CPUs doing this in parallel.
-Andi
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