| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-ID: <502A0C19.6010007@linux.vnet.ibm.com> Date: Tue, 14 Aug 2012 13:58:09 +0530 From: "Srivatsa S. Bhat" <srivatsa.bhat@...ux.vnet.ibm.com> To: Steven Rostedt <rostedt@...dmis.org> CC: tglx@...utronix.de, mingo@...nel.org, paulmck@...ux.vnet.ibm.com, josh@...htriplett.org, linux-kernel@...r.kernel.org Subject: [PATCH] preempt/hardirq.h: Clarify PREEMPT_ACTIVE bit location By default, the PREEMPT_ACTIVE flag is bit 27, but different architectures can override that. Update the comment to reflect this fact. Signed-off-by: Srivatsa S. Bhat <srivatsa.bhat@...ux.vnet.ibm.com> --- include/linux/hardirq.h | 5 +++++ 1 files changed, 5 insertions(+), 0 deletions(-) diff --git a/include/linux/hardirq.h b/include/linux/hardirq.h index 305f23c..483aa60 100644 --- a/include/linux/hardirq.h +++ b/include/linux/hardirq.h @@ -20,10 +20,15 @@ * hardirq nesting. An arch may choose to give less than 10 bits. * m68k expects it to be 8. * + * By default, the bits are defined as shown below: + * * - bits 16-25 are the hardirq count (max # of nested hardirqs: 1024) * - bit 26 is the NMI_MASK * - bit 27 is the PREEMPT_ACTIVE flag * + * However, different architectures may override them. (For example, + * x86 defines bit 28 as the PREEMPT_ACTIVE flag). + * * PREEMPT_MASK: 0x000000ff * SOFTIRQ_MASK: 0x0000ff00 * HARDIRQ_MASK: 0x03ff0000 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@...r.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Powered by blists - more mailing lists