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Message-Id: <1345306530-25665-1-git-send-email-andi@firstfloor.org>
Date:	Sat, 18 Aug 2012 09:15:29 -0700
From:	Andi Kleen <andi@...stfloor.org>
To:	mingo@...e.hu
Cc:	a.p.zijlstra@...llo.nl, linux-kernel@...r.kernel.org,
	Andi Kleen <ak@...ux.intel.com>
Subject: [PATCH 1/2] pebs, x86: Make sure to really disable PEBS

From: Andi Kleen <ak@...ux.intel.com>

When disabling a PEBS event we need to check the old value
to determine if PEBS was running. Otherwise the last PEBS value
could be kept running.

Signed-off-by: Andi Kleen <ak@...ux.intel.com>
---
 arch/x86/kernel/cpu/perf_event_intel_ds.c |    3 ++-
 1 files changed, 2 insertions(+), 1 deletions(-)

diff --git a/arch/x86/kernel/cpu/perf_event_intel_ds.c b/arch/x86/kernel/cpu/perf_event_intel_ds.c
index e38d97b..db49ab3 100644
--- a/arch/x86/kernel/cpu/perf_event_intel_ds.c
+++ b/arch/x86/kernel/cpu/perf_event_intel_ds.c
@@ -438,9 +438,10 @@ void intel_pmu_pebs_disable(struct perf_event *event)
 {
 	struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
 	struct hw_perf_event *hwc = &event->hw;
+	u64 old = cpuc->pebs_enabled;
 
 	cpuc->pebs_enabled &= ~(1ULL << hwc->idx);
-	if (cpuc->enabled)
+	if (old)
 		wrmsrl(MSR_IA32_PEBS_ENABLE, cpuc->pebs_enabled);
 
 	hwc->config |= ARCH_PERFMON_EVENTSEL_INT;
-- 
1.7.7.6

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