| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Date: Tue, 21 Aug 2012 08:47:18 +0000 From: Arnd Bergmann <arnd.bergmann@...aro.org> To: Viresh Kumar <viresh.kumar@...aro.org> Cc: Hein Tibosch <hein_tibosch@...oo.es>, "Hans-Christian Egtvedt" <hans-christian.egtvedt@...el.com>, Nicolas Ferre <nicolas.ferre@...el.com>, Havard Skinnemoen <havard@...nnemoen.net>, "ludovic.desroches" <ludovic.desroches@...el.com>, linux-kernel@...r.kernel.org, "spear-devel" <spear-devel@...t.st.com> Subject: Re: [PATCH] Fixes for dw_dmac and atmel-mci for AP700x On Tuesday 21 August 2012, Viresh Kumar wrote: > On 21 August 2012 14:04, Arnd Bergmann <arnd.bergmann@...aro.org> wrote: > > > Yes, this is very strange. Maybe the compiler already splits the > > access into two 16-byte loads and that confuses the device? > > @Arnd: Is compiler allowed to do that even when we have volatile specified > for the access? It shouldn't optimize the access at all i believe. Yes. The "volatile" keyword implies that the compiler has to do the access exactly once and that it cannot reorder the access with others on the same address, or read more data than is specified, but it can (and does) split the access if there is a reason for that, e.g. when the address might be misaligned and the architecture cannot do misaligned loads. Arnd -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@...r.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Powered by blists - more mailing lists