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Message-ID: <1346052285-4344-4-git-send-email-b29396@freescale.com>
Date: Mon, 27 Aug 2012 15:24:41 +0800
From: Dong Aisheng <b29396@...escale.com>
To: <linux-kernel@...r.kernel.org>
CC: <linux-arm-kernel@...ts.infradead.org>,
<linus.walleij@...ricsson.com>, <s.hauer@...gutronix.de>,
<shawn.guo@...aro.org>, <kernel@...gutronix.de>,
<grant.likely@...retlab.ca>, <rob.herring@...xeda.com>,
<sameo@...ux.intel.com>, <lrg@...com>,
<broonie@...nsource.wolfsonmicro.com>,
<richard.zhao@...escale.com>,
<devicetree-discuss@...ts.ozlabs.org>, <swarren@...dotorg.org>
Subject: [PATCH v2 3/7] ARM: imx6q: add anatop support into syscon
From: Dong Aisheng <dong.aisheng@...aro.org>
There're a few anatop registers need to be accessed by different modules.
Add anatop registers into syscon support for easy access.
Signed-off-by: Dong Aisheng <dong.aisheng@...aro.org>
---
arch/arm/boot/dts/imx6q.dtsi | 4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi
index bea21bc..db3fa15 100644
--- a/arch/arm/boot/dts/imx6q.dtsi
+++ b/arch/arm/boot/dts/imx6q.dtsi
@@ -378,8 +378,8 @@
interrupts = <0 87 0x04 0 88 0x04>;
};
- anatop@...c8000 {
- compatible = "fsl,imx6q-anatop";
+ anatop: anatop@...c8000 {
+ compatible = "fsl,imx6q-anatop", "syscon";
reg = <0x020c8000 0x1000>;
interrupts = <0 49 0x04 0 54 0x04 0 127 0x04>;
--
1.7.0.4
--
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