lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20120904093230.GA17873@dhcp-26-207.brq.redhat.com>
Date:	Tue, 4 Sep 2012 11:32:31 +0200
From:	Alexander Gordeev <agordeev@...hat.com>
To:	Yinghai Lu <yinghai@...nel.org>
Cc:	linux-kernel@...r.kernel.org, Ingo Molnar <mingo@...hat.com>,
	Thomas Gleixner <tglx@...utronix.de>,
	Bjorn Helgaas <bhelgaas@...gle.com>,
	Suresh Siddha <suresh.b.siddha@...el.com>,
	Jeff Garzik <jgarzik@...ox.com>,
	Matthew Wilcox <willy@...ux.intel.com>, x86@...nel.org,
	linux-pci@...r.kernel.org, linux-ide@...r.kernel.org
Subject: Re: [PATCH v2 -tip 1/5] x86, MSI: Support multiple MSIs in presense
 of IRQ remapping

On Mon, Sep 03, 2012 at 11:53:39AM -0700, Yinghai Lu wrote:
> On Mon, Sep 3, 2012 at 2:17 AM, Alexander Gordeev <agordeev@...hat.com> wrote:
> You may update create_irq_nr to be __create_irq_nr, and it could take
> extra count.
> 
> and later have create_irq_nr to be __create_irq_nr(,1,)
> and create_irqs to be __create_irq_nr(,count,)
> ....

Indeed. Will do.

> BTW, in short, how much performance benefits for adding 500 lines code?

Unfortunatelly, I do not have a short answer here. There are three types
of performance this series deals with - I'll try to summarize:

- devices - 3 SATA HDDs generate roughly one interrupt every 273 us while
  it get handled in less than 5 us. So there is/could be no increase here;

- the hardware context interrupt handler - its performance dropped 2.5 times
  (little bit more in fact) at the expense of increase of 1.3 times in
  overall interrupt handling time (hardware context + threaded context);

- overall system performance - I *assume* it should increase, because:
  (a) AHCI interrupt handlers keep local interrupts disabled 2.5 times less
  (b) separate AHCI IRQs become subjects of IRQ balancing
  (c) threaded handlers are per-device, per-CPU (well, up to irqbalanced)
      and executed with local interrupts enabled;

-- 
Regards,
Alexander Gordeev
agordeev@...hat.com
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ