lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:	Fri, 07 Sep 2012 11:47:42 -0700
From:	"H. Peter Anvin" <hpa@...or.com>
To:	Suresh Siddha <suresh.b.siddha@...el.com>
CC:	mingo@...nel.org, torvalds@...ux-foundation.org,
	andreas.herrmann3@....com, bp@...64.org, robert.richter@....com,
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH 1/3] x86, fpu: decouple non-lazy/eager fpu restore from
 xsave

On 09/07/2012 11:31 AM, Suresh Siddha wrote:
>
> +static inline void fx_finit(struct i387_fxsave_struct *fx)
> +{
> +	memset(fx, 0, xstate_size);
> +	fx->cwd = 0x37f;
> +	if (cpu_has_xmm)
> +		fx->mxcsr = MXCSR_DEFAULT;
> +}
> +

Incidentally, Al Viro asked a very good question the other day, which is 
why can't we just set mxcsr unconditionally here?  I don't think any 
CPUs with FXSAVE and no MXCSR (Pentium II from Intel, 
Crusoe/TM-3xxx/5xxx from Transmeta, and presumably some of the K6 
generation from AMD) ever looked at this field.

	-hpa
-- 
H. Peter Anvin, Intel Open Source Technology Center
I work for Intel.  I don't speak on their behalf.

--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ