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Message-ID: <ED492CCEAF882048BC2237DE806547C9079D9AB9@039-SN2MPN1-012.039d.mgd.msft.net>
Date:	Mon, 10 Sep 2012 02:53:35 +0000
From:	Xie Shaohui-B21989 <B21989@...escale.com>
To:	Kumar Gala <galak@...nel.crashing.org>
CC:	"jgarzik@...ox.com" <jgarzik@...ox.com>,
	"linux-ide@...r.kernel.org" <linux-ide@...r.kernel.org>,
	"linuxppc-dev@...ts.ozlabs.org" <linuxppc-dev@...ts.ozlabs.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	Bhartiya Anju-B07263 <B07263@...escale.com>
Subject: RE: [PATCH][v3] sata_fsl: add workaround for data length mismatch
 on freescale V2 controller

> > +	/* Workaround for data length mismatch errata */
> > +	if (unlikely(hstatus & INT_ON_DATA_LENGTH_MISMATCH)) {
> > +		for (tag = 0; tag < ATA_MAX_QUEUE; tag++) {
> > +			qc = ata_qc_from_tag(ap, tag);
> > +			if (qc && ata_is_atapi(qc->tf.protocol)) {
> > +				u32 hcontrol;
> > +#define HCONTROL_CLEAR_ERROR	(1 << 27)
> 
> shouldn't we have this #define be part of the enum that the other
> HCONTROL_ bits/flags are part of?
[S.H] do you mean this?

#ifdef SATA_FSL_XXX_ERRATUAM
#define HCONTROL_CLEAR_ERROR	(1 << 27)
#endif

Then we need to decide where to put "#define SATA_FSL_XXX_ERRATUAM".

It's only a readable definition of a register bit which avoiding magic number.


Best Regards, 
Shaohui Xie

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