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Message-ID: <5050F73D.8050701@wwwdotorg.org>
Date: Wed, 12 Sep 2012 14:57:33 -0600
From: Stephen Warren <swarren@...dotorg.org>
To: Thomas Petazzoni <thomas.petazzoni@...e-electrons.com>
CC: Sebastian Hesselbarth <sebastian.hesselbarth@...il.com>,
Grant Likely <grant.likely@...retlab.ca>,
Rob Herring <rob.herring@...xeda.com>,
Rob Landley <rob@...dley.net>,
Russell King <linux@....linux.org.uk>,
Lior Amsalem <alior@...vell.com>, Andrew Lunn <andrew@...n.ch>,
Jason Cooper <jason@...edaemon.net>,
Gregory CLEMENT <gregory.clement@...e-electrons.com>,
Ben Dooks <ben.dooks@...ethink.co.uk>,
Linus Walleij <linus.walleij@...aro.org>,
devicetree-discuss@...ts.ozlabs.org, linux-doc@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH v3 6/9] ARM: mvebu: add pinctrl device in DT for Armada
370/XP SoCs
On 09/12/2012 12:56 AM, Thomas Petazzoni wrote:
> Le Tue, 11 Sep 2012 16:23:19 -0600,
> Stephen Warren <swarren@...dotorg.org> a écrit :
>
>> On 09/10/2012 02:39 AM, Sebastian Hesselbarth wrote:
>>> From: Thomas Petazzoni <thomas.petazzoni@...e-electrons.com>
>>>
>>> The Armada 370 and XP SoCs have configurable muxing for a certain
>>> number of their pins, controlled through a pinctrl driver.
>>
>> Hmmm. I'd be tempted just to put the entire node definition there;
>> putting in a .dtsi file just to share the reg property doesn't seem
>> especially useful.
>
> When you say "here" you're mentioning the SoC-specific .dtsi files (i.e
(s/here/there I assume).
> the ones in PATCH 7/9 and PATCH 8/9), correct?
Yes, I believe so.
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