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Message-ID: <1347630180.7172.34.camel@twins>
Date:	Fri, 14 Sep 2012 15:43:00 +0200
From:	Peter Zijlstra <peterz@...radead.org>
To:	Stephane Eranian <eranian@...gle.com>
Cc:	mingo@...nel.org, linux-kernel <linux-kernel@...r.kernel.org>,
	Thomas Gleixner <tglx@...utronix.de>,
	Arnaldo Carvalho de Melo <acme@...radead.org>
Subject: Re: [RFC][PATCH] perf, intel: Expose SMI_COUNT as a fixed counter

On Wed, 2012-09-12 at 13:27 +0200, Peter Zijlstra wrote:
> Subject: perf, intel: Expose SMI_COUNT as a fixed counter
> From: Peter Zijlstra <a.p.zijlstra@...llo.nl>
> Date: Wed Sep 12 13:10:53 CEST 2012
> 
> The Intel SMI_COUNT sadly isn't a proper PMU event but a free-running
> MSR, expose it by creating another fake fixed PMC and another pseudo
> event.

OK, so it looks like this MSR has the same content on all CPUs.. is this
inherent to SMIs or is that just my box being funny?


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