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Message-ID: <401E54CE964CD94BAE1EB4A729C7087E379FDC1F2D@HQMAIL04.nvidia.com>
Date:	Wed, 19 Sep 2012 23:40:36 -0700
From:	Krishna Reddy <vdumpa@...dia.com>
To:	Stephen Warren <swarren@...dotorg.org>
CC:	Joerg Roedel <joerg.roedel@....com>, Arnd Bergmann <arnd@...db.de>,
	Hiroshi Doyu <hdoyu@...dia.com>,
	"m.szyprowski@...sung.com" <m.szyprowski@...sung.com>,
	"linux@....linux.org.uk" <linux@....linux.org.uk>,
	"minchan@...nel.org" <minchan@...nel.org>,
	"chunsang.jeong@...aro.org" <chunsang.jeong@...aro.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"subashrp@...il.com" <subashrp@...il.com>,
	"linaro-mm-sig@...ts.linaro.org" <linaro-mm-sig@...ts.linaro.org>,
	"linux-mm@...ck.org" <linux-mm@...ck.org>,
	"iommu@...ts.linux-foundation.org" <iommu@...ts.linux-foundation.org>,
	"linux-tegra@...r.kernel.org" <linux-tegra@...r.kernel.org>,
	"kyungmin.park@...sung.com" <kyungmin.park@...sung.com>,
	"pullip.cho@...sung.com" <pullip.cho@...sung.com>,
	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>
Subject: RE: [RFC 0/5] ARM: dma-mapping: New dma_map_ops to control IOVA
 more precisely

> > On Tegra, the following use cases need specific IOVA mapping.
> > 1. Few MMIO blocks need IOVA=PA mapping setup.
> 
> In that case, why would we enable the IOMMU for that one device; IOMMU
> disabled means VA==PA, right? Perhaps isolation of the device so it can only
> access certain PA ranges for security?

The device(H/W controller) need to access few special memory blocks(IOVA==PA)
and DRAM as well. If IOMMU is disabled, then it has to handle memory fragmentation,
 which defeats the purpose of IOMMU support.
There is also a case where frame buffer memory is passed from BootLoader to Kernel and
display H/W  continues to access it with IOMMU enabled. To support this, the one to one
mapping has to be setup before enabling IOMMU.

-KR



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