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Message-ID: <CABPqkBSnmeP1HoWiR80-yPuTvKLgtH+NcTM5WgjkXDmiUGhtwQ@mail.gmail.com>
Date: Fri, 28 Sep 2012 10:57:08 +0200
From: Stephane Eranian <eranian@...gle.com>
To: Peter Zijlstra <a.p.zijlstra@...llo.nl>
Cc: Andi Kleen <andi@...stfloor.org>,
LKML <linux-kernel@...r.kernel.org>, x86 <x86@...nel.org>,
Arnaldo Carvalho de Melo <acme@...hat.com>,
Andi Kleen <ak@...ux.intel.com>
Subject: Re: [PATCH 08/31] perf, x86: Report PEBS event in a raw format
On Fri, Sep 28, 2012 at 10:54 AM, Peter Zijlstra <a.p.zijlstra@...llo.nl> wrote:
> On Thu, 2012-09-27 at 21:31 -0700, Andi Kleen wrote:
>> Left over are the general registers. We need them for some analysis
>> too: for example for loop trip count and string instruction trip
>> count sampling.
>>
>> There isn't really any good way to generalize general registers.
>> Obviously they are different for every architecture.
>
> You missed the whole PERF_SAMPLE_REGS_USER stuff?
I will soon post a patchset to expose PEBS state. The patch set piggybacks
on the infrastructure used for USER_REGS and introduce a new sample_intr_regs
bitmask. That would be a more generic way of exposing the other fields
of the PEBS
record.
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