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Message-ID: <50650A7E.90807@zytor.com>
Date: Thu, 27 Sep 2012 19:25:02 -0700
From: "H. Peter Anvin" <hpa@...or.com>
To: Seiji Aguchi <seiji.aguchi@....com>
CC: "Thomas Gleixner (tglx@...utronix.de)" <tglx@...utronix.de>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"rostedt@...dmis.org" <rostedt@...dmis.org>,
"'mingo@...e.hu' (mingo@...e.hu)" <mingo@...e.hu>,
"x86@...nel.org" <x86@...nel.org>,
"dle-develop@...ts.sourceforge.net"
<dle-develop@...ts.sourceforge.net>,
Satoru Moriya <satoru.moriya@....com>
Subject: Re: [PATCH v4] trace,x86: add x86 irq vector tracepoints
On 09/27/2012 03:33 PM, Seiji Aguchi wrote:
> Hi,
>
>> ... except the cost can be reduced to zero *AND* be made into a more general mechanism by simply hooking the IDT.
>
> Thank you for giving me the comment.
> In my understanding, we can introduce a more general mechanism by sandwiching an existing handler between tracepoints.
> The pseudo code is like this:
>
> @@ -17,7 +18,7 @@ static void default_threshold_interrupt(void)
>
> void (*mce_threshold_vector)(void) = default_threshold_interrupt;
>
> -asmlinkage void smp_threshold_interrupt(void)
> +static void do_smp_threshold_interrupt(void)
> {
> irq_enter();
> exit_idle();
> @@ -27,3 +28,10 @@ asmlinkage void smp_threshold_interrupt(void)
> /* Ack only at the end to avoid potential reentry */
> ack_APIC_irq();
> }
> +
> +asmlinkage void smp_threshold_interrupt(void) {
> + trace_arch_irq_vector_entry(THRESHOLD_APIC_VECTOR);
> + do_smp_threshold_interrupt();
> + trace_arch_irq_vector_exit(THRESHOLD_APIC_VECTOR);
> +}
>
> If I misunderstand something, please let me know.
>
Quite.
These functions are being invoked from the IDT, which is an indirect
pointer structure. When not being traced, there is absolutely no reason
why it should go through a thunk with tracepoints.
-hpa
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