lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20121002045842.GC7756@gmail.com>
Date:	Tue, 2 Oct 2012 06:58:42 +0200
From:	Ingo Molnar <mingo@...nel.org>
To:	Alexander Gordeev <agordeev@...hat.com>
Cc:	linux-kernel@...r.kernel.org, Ingo Molnar <mingo@...hat.com>,
	Thomas Gleixner <tglx@...utronix.de>,
	Bjorn Helgaas <bhelgaas@...gle.com>,
	Suresh Siddha <suresh.b.siddha@...el.com>,
	Yinghai Lu <yinghai@...nel.org>,
	Jeff Garzik <jgarzik@...ox.com>,
	Matthew Wilcox <willy@...ux.intel.com>, x86@...nel.org,
	linux-pci@...r.kernel.org, linux-ide@...r.kernel.org
Subject: Re: [PATCH v3 -tip 2/5] x86, MSI: Allocate as many multiple IRQs as
 requested


* Alexander Gordeev <agordeev@...hat.com> wrote:

> When multiple MSIs are enabled with pci_enable_msi_block() the number of
> allocated IRQs 'nvec' is rounded up to the nearest value of power of two.
> That could lead to a condition when number of requested and used IRQs is
> less than number of actually allocated IRQs.
> 
> This fix introduces 'msi_desc::nvec' field to address the above issue -
> when non-zero, it holds the number of allocated IRQs. Otherwise, the old
> method is used.
> 
> Signed-off-by: Alexander Gordeev <agordeev@...hat.com>
> ---
>  arch/x86/kernel/apic/io_apic.c |   16 +++++++---------
>  drivers/pci/msi.c              |   10 ++++++++--
>  include/linux/msi.h            |    1 +
>  3 files changed, 16 insertions(+), 11 deletions(-)

This should be switched with the first patch: first extend the 
generic MSI code, then add x86 support for that variant.

Adding multi-MSI support in one patch then tweaking it in the 
very next patch makes little sense and cannot possibly have been 
tested much so it's a potential bisection trap.

Thanks,

	Ingo
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ