| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-ID: <20121002091301.GA8847@mudshark.cambridge.arm.com> Date: Tue, 2 Oct 2012 10:13:01 +0100 From: Will Deacon <will.deacon@....com> To: Stephen Boyd <sboyd@...eaurora.org> Cc: "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>, "linux-arm-kernel@...ts.infradead.org" <linux-arm-kernel@...ts.infradead.org> Subject: Re: [PATCH] ARM: hw_breakpoint: Clear breakpoints before enabling monitor mode On Tue, Oct 02, 2012 at 01:34:28AM +0100, Stephen Boyd wrote: > On 09/24/12 10:19, Will Deacon wrote: > > Ok, I've pushed a bunch of patches to my hw-breakpoint branch (head commit > > 55cb726797c7). I'll post them to the list after the merge window, but please > > do take them for a spin if you get a chance. > > > > Forgot to reply here. Took them for a spin last week with that commit. > No more boot hangs but I can't say much else beyond that. When you post > to the list I'll add my tested-by. Thanks Stephen. I've also got some patches for OS save/restore of the debug registers using the various hardware locking and readout mechanisms, so that debug state can be persisted across low-power states. Do any of the Qualcomm chips (v7 as opposed to v7.1) implement the save/restore registers? Will -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@...r.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Powered by blists - more mailing lists