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Message-ID: <CABPqkBSzgEjM9s3i5kQ-BSP-q6F3=8MwXfZ6B31UyJpEJ1Q9JA@mail.gmail.com>
Date: Tue, 2 Oct 2012 14:01:00 +0200
From: Stephane Eranian <eranian@...gle.com>
To: Peter Zijlstra <a.p.zijlstra@...llo.nl>
Cc: Jiri Olsa <jolsa@...hat.com>, LKML <linux-kernel@...r.kernel.org>,
Frederic Weisbecker <fweisbec@...il.com>,
Ingo Molnar <mingo@...e.hu>, Paul Mackerras <paulus@...ba.org>,
Arnaldo Carvalho de Melo <acme@...hat.com>
Subject: Re: [PATCH] perf cgroups: Fix perf_cgroup_switch schedule in warning
On Tue, Oct 2, 2012 at 1:53 PM, Peter Zijlstra <a.p.zijlstra@...llo.nl> wrote:
>
> On Tue, 2012-10-02 at 13:42 +0200, Jiri Olsa wrote:
> > +++ b/kernel/events/core.c
> > @@ -394,7 +394,8 @@ void perf_cgroup_switch(struct task_struct *task, int mode)
> > }
> >
> > if (mode & PERF_CGROUP_SWIN) {
> > - WARN_ON_ONCE(cpuctx->cgrp);
> > + WARN_ON_ONCE(cpuctx->cgrp && !cpuctx->ctx.is_active);
> > +
Wait a minute, I thought we had fixed that problem which was caused by
the AMD IBS
pmu not having the task_ctx_nr set properly or something like that. We
were wrongfully
sharing the cpuctx between PMUs.
>
> > /* set cgrp before ctxsw in to
> > * allow event_filter_match() to not
> > * have to pass task around
>
> OK, like you mentioned this is the result of multiple PMU being able to
> share a cpuctx, shouldn't we in that case avoid the second loop over the
> cpuctx as a whole?
>
> Would something like the below do? IIRC I introduced that active_pmu for
> exactly such reasons..
>
> ---
> kernel/events/core.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/kernel/events/core.c b/kernel/events/core.c
> index 7b9df35..e98f014 100644
> --- a/kernel/events/core.c
> +++ b/kernel/events/core.c
> @@ -372,6 +372,8 @@ void perf_cgroup_switch(struct task_struct *task, int mode)
>
> list_for_each_entry_rcu(pmu, &pmus, entry) {
> cpuctx = this_cpu_ptr(pmu->pmu_cpu_context);
> + if (cpuctx->active_pmu != pmu)
> + continue;
>
> /*
> * perf_cgroup_events says at least one
>
--
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