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Message-ID: <cover.1349517905.git.agordeev@redhat.com>
Date: Sun, 7 Oct 2012 07:24:58 +0200
From: Alexander Gordeev <agordeev@...hat.com>
To: linux-kernel@...r.kernel.org
Cc: Ingo Molnar <mingo@...hat.com>,
Thomas Gleixner <tglx@...utronix.de>,
Bjorn Helgaas <bhelgaas@...gle.com>,
Suresh Siddha <suresh.b.siddha@...el.com>,
Yinghai Lu <yinghai@...nel.org>,
Jeff Garzik <jgarzik@...ox.com>,
Matthew Wilcox <willy@...ux.intel.com>, x86@...nel.org,
linux-pci@...r.kernel.org, linux-ide@...r.kernel.org
Subject: [PATCH v4 -tip 0/3] x86, MSI, AHCI: Support multiple MSIs
Hello,
Compared to v3:
Based on Ingo's review:
I have not noticed that v3 2/5 patch "x86, MSI: Allocate as many
multiple IRQs as requested" is redundant, since the AHCI code
tries to allocate maximum possible number of MSIs. As there are
no other users of this functionality, I removed the patch for now;
v3 patch 3/5 "x86, MSI: Minor readability fixes" merged into
v4 patch 1/3 "x86, MSI: Support multiple MSIs in presense of IRQ
remapping";
1,3/3: multi-line comments fixed;
loops 'for (; i; i--)' changed to 'for (i--; i >= 0; i--)';
3/3: ahci_host_activate() failure path tested;
ahci_port_priv::lock field commented;
Alexander Gordeev (3):
1/3 x86, MSI: Support multiple MSIs in presense of IRQ remapping
2/3 PCI, MSI: Enable multiple MSIs with pci_enable_msi_block_auto()
3/3 AHCI: Support multiple MSIs
Documentation/PCI/MSI-HOWTO.txt | 37 ++++++++-
arch/x86/kernel/apic/io_apic.c | 165 +++++++++++++++++++++++++++++++--------
drivers/ata/ahci.c | 93 +++++++++++++++++++++-
drivers/ata/ahci.h | 6 ++
drivers/ata/libahci.c | 118 ++++++++++++++++++++++++++--
drivers/pci/msi.c | 26 ++++++
include/linux/irq.h | 5 +
include/linux/pci.h | 7 ++
kernel/irq/chip.c | 30 +++++--
9 files changed, 432 insertions(+), 55 deletions(-)
--
1.7.7.6
--
Regards,
Alexander Gordeev
agordeev@...hat.com
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