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Message-ID: <CAJe_ZhfarH-HpJkEOpH=jY1Gc-UPEyuA4bJ4LSQES7Uyea2BQw@mail.gmail.com>
Date: Thu, 18 Oct 2012 14:59:10 +0530
From: Jassi Brar <jaswinder.singh@...aro.org>
To: Huang Shijie <b32955@...escale.com>
Cc: Vinod Koul <vinod.koul@...ux.intel.com>, marex@...x.de,
Huang Shijie <shijie8@...il.com>, alsa-devel@...a-project.org,
shawn.guo@...aro.org, linux@....linux.org.uk, tiwai@...e.de,
artem.bityutskiy@...ux.intel.com,
broonie@...nsource.wolfsonmicro.com, linux-mmc@...r.kernel.org,
w.sang@...gutronix.de, perex@...ex.cz,
linux-mtd@...ts.infradead.org, linux-i2c@...r.kernel.org,
ben-linux@...ff.org, djbw@...com, khali@...ux-fr.org,
cjb@...top.org, dwmw2@...radead.org, lrg@...com,
linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH] dma: add new DMA control commands
On 18 October 2012 12:15, Huang Shijie <b32955@...escale.com> wrote:
> 于 2012年10月18日 14:18, Vinod Koul 写道:
>
>> Why cant you do start (prepare clock etc) when you submit the descriptor
>> to dmaengine. Can be done in tx_submit callback.
>> Similarly remove the clock when dma transaction gets completed.
>
> I ever thought this method too.
>
> But it will become low efficient in the following case:
>
> Assuming the gpmi-nand driver has to read out 1024 pages in one _SINGLE_
> read operation.
> The gpmi-nand will submit the descriptor to dmaengine per page. So with your
> method,
> the system will repeat the enable/disable dma clock 1024 time. At every
> enable/disable dma clock,
> the system has to enable the clock chain and it's parents ...
>
> But with this patch, we only need to enable/disable dma clock one time, just
> at we select the nand chip.
>
If the clock is the dmac's property (not channels'), the toggling
seems too aggressive.
You could try using runtime_suspend/resume for clock
disabling/enabling. How about employing autosuspend with a few ms
delay?
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