linux-kernel - Re: radeon: RFC speed cap detection on ppc64

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Message-ID: <CAErSpo7-BEiBWBYNdEdx_UhqYaMkqvaMck5uYCivVDVYX+qPuQ@mail.gmail.com>
Date:	Mon, 22 Oct 2012 10:59:44 -0600
From:	Bjorn Helgaas <bhelgaas@...gle.com>
To:	Alan Cox <alan@...rguk.ukuu.org.uk>
Cc:	Adam Jackson <ajax@...hat.com>,
	Lucas Kannebley Tavares <lucaskt@...ux.vnet.ibm.com>,
	dri-devel@...ts.freedesktop.org,
	Benjamin Herrenschmidt <benh@....ibm.com>,
	linux-pci@...r.kernel.org,
	Nishanth Aravamudan <nacc@...ux.vnet.ibm.com>,
	linux-kernel@...r.kernel.org,
	Brian King <brking@...ux.vnet.ibm.com>
Subject: Re: radeon: RFC speed cap detection on ppc64

On Mon, Oct 22, 2012 at 9:44 AM, Alan Cox <alan@...rguk.ukuu.org.uk> wrote:
>> That (walking all parent nodes) is probably the safest thing to do.  I'm
>> not sure whether it's optimal.  It would likely depend on whether you
>> can meaningfully have a bridge that's faster on the downstream side than
>> on the upstream.
>
> This is architecture goo at heart - would this be better as a helper in
> the PCI and arch PCI code ?

Good point.

POWER is not the only architecture where host bridges do not appear as
devices in PCI config space -- ia64 has that, too.  So the comment is
too specific.

The link is a point-to-point thing, so this should be a local
negotiation between the radeon device and the upstream bridge.  I
don't see the point of walking any farther up the chain.

drm_pcie_get_speed_cap_mask() should also be changed to use
pcie_capability_read_dword() to avoid any issues with v1/v2 PCI
Express Capability structures.

Bjorn
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