lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite for Android: free password hash cracker in your pocket
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:	Tue, 23 Oct 2012 13:28:07 +0800
From:	"Yan, Zheng" <zheng.z.yan@...el.com>
To:	Peter Zijlstra <a.p.zijlstra@...llo.nl>
CC:	linux-kernel@...r.kernel.org, eranian@...gle.com,
	ak@...ux.intel.com
Subject: Re: [PATCH 1/6] perf, x86: Basic Haswell LBR call stack support

On 10/22/2012 06:33 PM, Peter Zijlstra wrote:
> On Mon, 2012-10-22 at 14:11 +0800, Yan, Zheng wrote:
>> +       /* LBR callstack does not work well with FREEZE_LBRS_ON_PMI */
>> +       if (!cpuc->lbr_sel || !(cpuc->lbr_sel->config & LBR_CALL_STACK))
>> +               debugctl |= DEBUGCTLMSR_FREEZE_LBRS_ON_PMI; 
> 
> How useful it is without this? How many calls between PMI and us getting
> to intel_pmu_lbr_read()?
> 

So far we use the call stack feature only for ring 3. but even for ring 0,
it's OK. because LBR is disabled at the very beginning of PMI hander, and
enabled when exiting the PMI hander. the depth to _intel_pmu_lbr_enable/
_intel_pmu_lbr_disable are the same. So entries that are added by calling
_intel_pmu_lbr_disable will be popped during enabling LBR.

Regards
Yan, Zheng
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ