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Message-ID: <1351097084.6537.110.camel@edumazet-glaptop>
Date:	Wed, 24 Oct 2012 18:44:44 +0200
From:	Eric Dumazet <eric.dumazet@...il.com>
To:	Peter LaDow <petela@...ougs.wsu.edu>
Cc:	linux-kernel@...r.kernel.org
Subject: Re: Process Hang in __read_seqcount_begin

On Wed, 2012-10-24 at 09:30 -0700, Peter LaDow wrote:
> On Tue, Oct 23, 2012 at 9:32 PM, Eric Dumazet <eric.dumazet@...il.com> wrote:
> > Could you try following patch ?
> 
> Thanks for the suggestion. But I have a question about the patch below.
> 
> > +       /* Note : cmpxchg() is a memory barrier, we dont need smp_wmb() */
> > +       if (old != new && cmpxchg(&ptr->sequence, old, new) == old)
> > +               return 1;
> > +       return 0;
> 
> Looking at arch/powerpc/include/asm/system.h, cmpxchg is defined as a
> call to __cmpxchg_u32 (we are 32-bit, and I presume the size is 32
> bits):
> 
> static __always_inline unsigned long
> __cmpxchg_u32(volatile unsigned int *p, unsigned long old, unsigned long new)
> {
>         unsigned int prev;
> 
>         __asm__ __volatile__ (
>         PPC_RELEASE_BARRIER
> "1:     lwarx   %0,0,%2         # __cmpxchg_u32\n\
>         cmpw    0,%0,%3\n\
>         bne-    2f\n"
>         PPC405_ERR77(0,%2)
> "       stwcx.  %4,0,%2\n\
>         bne-    1b"
>         PPC_ACQUIRE_BARRIER
>         "\n\
> 2:"
>         : "=&r" (prev), "+m" (*p)
>         : "r" (p), "r" (old), "r" (new)
>         : "cc", "memory");
> 
>         return prev;
> }
> 
> And the interesting part is PPC_RELEASE_BARRIER and
> PPC_ACQUIRE_BARRIER.  Both of these are noops in non SMP systems.
> From arch/powerpc/include/asm/sync.h:
> 
> #ifdef CONFIG_SMP
> #define __PPC_ACQUIRE_BARRIER                           \
>         START_LWSYNC_SECTION(97);                       \
>         isync;                                          \
>         MAKE_LWSYNC_SECTION_ENTRY(97, __lwsync_fixup);
> #define PPC_ACQUIRE_BARRIER     "\n" stringify_in_c(__PPC_ACQUIRE_BARRIER)
> #define PPC_RELEASE_BARRIER     stringify_in_c(LWSYNC) "\n"
> #else
> #define PPC_ACQUIRE_BARRIER
> #define PPC_RELEASE_BARRIER
> #endif
> 
> So, if these are noops, does this really become an atomic operation?

On UP that would be an 'atomic operation' yes, because of lwarx/stwcx.



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