linux-kernel - Re: [PATCH 2/3] x86,mm: drop TLB flush from ptep_set_access

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Message-ID: <508B59B0.5010503@redhat.com>
Date:	Fri, 26 Oct 2012 23:49:04 -0400
From:	Rik van Riel <riel@...hat.com>
To:	Alan Cox <alan@...rguk.ukuu.org.uk>
CC:	Ingo Molnar <mingo@...nel.org>, Andi Kleen <andi@...stfloor.org>,
	Michel Lespinasse <walken@...gle.com>,
	Linus Torvalds <torvalds@...ux-foundation.org>,
	Peter Zijlstra <a.p.zijlstra@...llo.nl>,
	Andrea Arcangeli <aarcange@...hat.com>,
	Mel Gorman <mgorman@...e.de>,
	Johannes Weiner <hannes@...xchg.org>,
	Thomas Gleixner <tglx@...utronix.de>,
	Andrew Morton <akpm@...ux-foundation.org>,
	linux-kernel@...r.kernel.org, linux-mm@...ck.org
Subject: Re: [PATCH 2/3] x86,mm: drop TLB flush from ptep_set_access_flags

On 10/26/2012 05:12 PM, Alan Cox wrote:
> On Fri, 26 Oct 2012 14:45:02 -0400
> Rik van Riel <riel@...hat.com> wrote:
>
>> Intel has an architectural guarantee that the TLB entry causing
>> a page fault gets invalidated automatically. This means
>> we should be able to drop the local TLB invalidation.
>>
>> Because of the way other areas of the page fault code work,
>> chances are good that all x86 CPUs do this.  However, if
>> someone somewhere has an x86 CPU that does not invalidate
>> the TLB entry causing a page fault, this one-liner should
>> be easy to revert.
>
> This does not strike me as a good standard of validation for such a change
>
> At the very least we should have an ACK from AMD and from VIA, and
> preferably ping RDC and some of the other embedded folks. Given an AMD
> and VIA ACK I'd be fine. I doubt anyone knows any more what Cyrix CPUs
> did or cared about and I imagine H Peter or Linus can answer for
> Transmeta ;-)

Fair enough.

If it turns out any of those CPUs need an explicit
flush, then we can also adjust flush_tlb_fix_spurious_fault
to actually do a local flush on x86 (or at least on those
CPUs).

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