linux-kernel - Re: [PATCH v3 01/11] clk: davinci

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Message-ID: <CACRpkdaa8f7N90hknaqZmNeYD1SjQx6Fm35nS34CxwnH+fwEfg@mail.gmail.com>
Date:	Sun, 28 Oct 2012 20:18:08 +0100
From:	Linus Walleij <linus.walleij@...aro.org>
To:	Murali Karicheri <m-karicheri2@...com>
Cc:	mturquette@...aro.org, arnd@...db.de, akpm@...ux-foundation.org,
	shawn.guo@...aro.org, rob.herring@...xeda.com,
	viresh.linux@...il.com, linux-kernel@...r.kernel.org,
	nsekhar@...com, khilman@...com, linux@....linux.org.uk,
	sshtylyov@...sta.com,
	davinci-linux-open-source@...ux.davincidsp.com,
	linux-arm-kernel@...ts.infradead.org, linux-keystone@...t.ti.com
Subject: Re: [PATCH v3 01/11] clk: davinci - add main PLL clock driver

On Thu, Oct 25, 2012 at 6:11 PM, Murali Karicheri <m-karicheri2@...com> wrote:

> This is the driver for the main PLL clock hardware found on DM SoCs.
> This driver borrowed code from arch/arm/mach-davinci/clock.c and
> implemented the driver as per common clock provider API. The main PLL
> hardware typically has a multiplier, a pre-divider and a post-divider.
> Some of the SoCs has the divider fixed meaning they can not be
> configured through a register. HAS_PREDIV and HAS_POSTDIV flags are used
> to tell the driver if a hardware has these dividers present or not.
> Driver is configured through the struct clk_pll_data that has the
> SoC specific clock data.
>
> Signed-off-by: Murali Karicheri <m-karicheri2@...com>

This looks good to me.
Acked-by: Linus Walleij <linus.walleij@...aro.org>

Yours,
Linus Walleij
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