linux-kernel - Re: [Patch v1 06/10] perf/x86: add support for PEBS Precise Store

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Message-ID: <1351525219.24721.38.camel@twins>
Date:	Mon, 29 Oct 2012 16:40:19 +0100
From:	Peter Zijlstra <peterz@...radead.org>
To:	Stephane Eranian <eranian@...gle.com>
Cc:	linux-kernel@...r.kernel.org, mingo@...e.hu, ak@...ux.intel.com,
	acme@...hat.com, jolsa@...hat.com, ming.m.lin@...el.com
Subject: Re: [Patch v1 06/10] perf/x86: add support for PEBS Precise Store

On Mon, 2012-10-29 at 16:15 +0100, Stephane Eranian wrote:
> -       if (fll) {
> +       if (fll || fst) {
>                 if (sample_type & PERF_SAMPLE_ADDR)
>                         data.addr = pebs->dla;
>  
> @@ -688,6 +731,8 @@ static void __intel_pmu_pebs_event(struct perf_event *event,
>                 if (sample_type & PERF_SAMPLE_DSRC) {
>                         if (fll)
>                                 data.dsrc.val = load_latency_data(pebs->dse);
> +                       else if (fst)
> +                               data.dsrc.val = precise_store_data(pebs->dse);
>                 }
>         }
>   

Ah, this is why I guess.. hrm.. ok, n/m then.
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