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Message-ID: <20121106133135.GC25167@tassilo.jf.intel.com>
Date: Tue, 6 Nov 2012 05:31:35 -0800
From: Andi Kleen <ak@...ux.intel.com>
To: Stephane Eranian <eranian@...gle.com>
Cc: linux-kernel@...r.kernel.org, peterz@...radead.org, mingo@...e.hu,
acme@...hat.com, jolsa@...hat.com, namhyung.kim@....com
Subject: Re: [PATCH v2 08/16] perf/x86: add memory profiling via PEBS Load
Latency
> +EVENT_ATTR(cpu-cycles, CPU_CYCLES );
> +EVENT_ATTR(instructions, INSTRUCTIONS );
> +EVENT_ATTR(cache-references, CACHE_REFERENCES );
> +EVENT_ATTR(cache-misses, CACHE_MISSES );
> +EVENT_ATTR(branch-instructions, BRANCH_INSTRUCTIONS );
> +EVENT_ATTR(branch-misses, BRANCH_MISSES );
> +EVENT_ATTR(bus-cycles, BUS_CYCLES );
> +EVENT_ATTR(stalled-cycles-frontend, STALLED_CYCLES_FRONTEND );
> +EVENT_ATTR(stalled-cycles-backend, STALLED_CYCLES_BACKEND );
> +EVENT_ATTR(ref-cycles, REF_CPU_CYCLES );
The merge_events() approach from the Haswell patches should be far cleaner
-Andi
--
ak@...ux.intel.com -- Speaking for myself only
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